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Volume 28, No. 1 |
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A Publication of the Materials Research Society
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MICROELECTRONICS PACKAGING AND INTEGRATION
Microelectronics Packaging and Integration,
11
R.H. Reuss and B.R. Chalamala, Guest Editors
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Critical Aspects of High-Performance Microprocessor Packaging,
21
V.P. Atluri, R.V. Mahajan, P.R. Patel, D. Mallik, J. Tang, V.S. Wakharkar,
G.M. Chrysler, C.-P. Chiu, G.N. Choksi, R.S. Viswanath
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Materials for 3D Packaging of Electronic and Optoelectronic
Systems, 35
V.H. Ozguz and J. Yamaguchi
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High-Performance Packaging of Power Electronics, 41
M.C. Shaw
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Packaging Options for MEMS Devices, 51
E. Jung
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Low-Cost Wafer-Level Vacuum Packaging for MEMS, 55
R. Gooch and T. Schimert
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Chip-to-Module Interconnections Using "Sea of Leads"
Technology, 61
M.S. Bakir, H.A. Reed, A.V. Mulé, J.P. Jayachandran, P.A. Kohl,
K.P. Martin, T.K. Gaylord, and J.D. Meindl
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Emerging Materials Challenges in Microelectronics Packaging,
68
D.R. Frear and S. Thomas
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Mayo Leads MRS Board of
Directors in 2003, 75
MRS
Bulletin Volume Oranizers Guide Technical Theme Topics for 2004,
77

Abstracts for February 2003 Journal of Materials Research, 78

Letter from the President,
3
MRS FAQs
M.J. Mayo
Calendar, 81
Classified, 84
Posterminaries, 88 ![]()
Explain Yourself
A. King
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ON THE COVER: Microelectronics Packaging and Integration. (left) Schematic cross section of a typical power package for an adjustable-speed motor drive or rf power amplifier (not to scale), and a high-magnification optical photograph of a polished cross section through a commercially available module. (upper right and background cover) Scanning electron microscopy images of an array of S-shaped compliant metal leads fabricated above a polymer film embedded with highly compressible air gaps. (center right) An 84-pin ceramic package showing mounted arrays. (lower right) Wire-bond interconnects. See the technical theme that begins on p. 11.
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