Volume 27, No. 3
March 2002

A Publication of the Materials Research Society
March 2002 MRS Bulletin
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ALTERNATIVE GATE DIELECTRICS FOR MICROELECTRONICS

Introduction: Alternative Gate Dielectrics for Microelectronics, 186
R.M. Wallace and G. Wilk, Guest Editors
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High-k Gate Dielectric Materials. 192
R.M. Wallace and G. Wilk
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A Thermodynamic Approach to Selecting Alternative Gate Dielectrics, 198
D.G. Schlom and J.H. Haeni
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Materials Characterization of Alternative Gate Dielectrics, 206
B.W. Busch, O. Pluchery, Y.J. Chabal, D.A. Muller, R.L. Opila, J.R. Kwo, and E. Garfunkel
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Issues in High-k Gate Stack Interfaces, 212
V. Misra, G. Lucovsky, and G. Parsons
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Electronic Structure and Band Offsets of High-Dielectric-Constant Gate Oxides, 217
J. Robertson
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On the Electrical Characterization of High-k Dielectrics, 222
R. Degraeve, E. Cartier, T. Kauerauf, R. Carter, L. Pantisano, A. Kerber, and G. Groeseneken
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Compatibility Challenges for High-k Materials Integration into CMOS Technology, 226
S. Guha, E. Gusev, M. Copel, L.-A. Ragnarsson, and D.A. Buchanan
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2001 MRS Fall Meeting Highlights Innovations in Materials Research, 232
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Abstracts for April 2002 Journal of Materials Research, 155

Letter from the President -- See You in San Francisco!, A. King, 165
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Research/Researchers, 166
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Technology Advances, 179
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Washington News, 182
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Public Affairs Forum, 183
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Resources, 184

Advertisers in this Issue, 230

Calendar, 262
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Classified, 266

Posterminaries, 272
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ON THE COVER: Alternative Gate Dielectrics for Microelectronics. (center) Transmission electron microscopy (TEM) image of a vertical replacement-gate (VRG) transistor structure (gate length 50 nm), shown with a highly conformal HfO2 gate dielectric (thin black line winding around entire structure) deposited by atomic layer deposition. VRGs are novel double-gate devices with two channels driving in parallel. Superimposed on the image is an atomic model representing a typical structure for high-k gate dielectrics on Si. The single-crystal Si substrate atoms (gray) are well ordered at the bottom of the model, followed by a disordered region of Si-O (O atoms are red), often only several monolayers thick. This disorder can be formed intentionally before high-k deposition, such as by thermally grown SiO2, or unintentionally by reaction during high-k deposition. On top of the disordered layer is a (typically) polycrystalline high-k material, where the metal cations (inside the solid tetrahedra) can take on several bonding coordinations, depending on the cation (Hf is usually sixfold- or eightfold-coordinated). (upper right) A close-up view, via high-resolution TEM, of the region encompassed by the gray box. The HfO2 gate dielectric (black layer) is polycrystalline, and the HfO2 lattice fringes maintain the same orientation while bending around the corner of the device. (lower right) Example of transistor performance, showing measured drive current ID, normalized by transistor gate width, versus applied drain voltage VDS. These curves are meas-ured as a function of gate overdrive, VGS - VT (applied gate voltage minus threshold voltage). The actual gate overdrive conditions used in products are determined by the technology node and the particular application of interest. The guest editors are grateful to D. Muller and P. Voyles of Bell Laboratories and J. Hergenrother of Agere Systems for their contributions to the cover montage. See the technical theme that begins on p. 186.

 

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