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Advances in Thin Film Simulations
and Experimental Verification
1999 MRS Workshop
Series
June 23-25, 1999
Fairmont Hotel,
San Jose, California
Organizers:
Harry Atwater, California Institute of Technology
George Gilmer, Lucent Technologies
Imran Hashim, Applied Materials
Paco Leon, Intel Corporation
[Detailed Program
and Schedule is available]
This workshop will bring together physicists,
chemists, mathematicians and engineers working on the deposition
of metal, metal diffusion barrier, and dielectric films for application
to silicon device interconnects. Invited speakers from industrial
laboratories will identify areas where simulation models have
facilitated process and tool development, and areas where there
is a current need for accurate simulations. In addition, model
development and improvements will be described, including talks
on fundamental studies which advance the understanding of physical
processes, new mathematics and computational methods which can
improve the reliability and speed of the simulations, and the
validation of the models by experiments and pilot line tests.
The development of simplified models for use during process development
will be discussed; these models are needed when a wide range
of parameter values must be explored. Examples of thin film deposition
simulations, which helped improve product yields, will be discussed.
Papers for poster sessions are solicited
from the following areas:
Fundamental crystal growth experiments and
theory related to thin film deposition.
Magnetron sputtering modeling and experiments.
Models of high density plasmas for ionized metal sputtering.
Atomistic simulations of thin film depositions using molecular
dynamics, lattice Monte Carlo, and other techniques.
Simulations of sputtering for various target materials.
Reactor-scale simulations dealing with issues such as uniformity.
Models and experiments of step coverage during PVD.
Interconnect scaling and its impact on materials requirements
for interconnects.
Diffusion barriers for copper metallization: models and experiments.
Models for predicting microstructure including grain boundaries,
density, and void geometries especially for Damascene interconnects.
Microscopy for validation of thin film structure simulations.
Models of chemical vapor deposition processes for metal deposition.
Robust methods to simulate surface evolution; e.g., level set
techniques.
Models for reactive ion etching.
Models of electrochemical deposition processes.
Model reduction applications.
Models linking interconnect reliability to microstructure.
First-principles calculations of atomic level energetics and
diffusivity.
Abstracts are required for invited speakers
and for the poster session. Several poster abstracts will be
selected by the organizers for oral presentation, although a
very limited number of time slots is available for this purpose.
Abstracts submitted by mail are due April 15; abstracts submitted
via e-mail are due April 30.
Partial List of Invited Speakers:
Tomas Diaz de la Rubia, Lawrence Livermore
National Laboratory
Haydn Wadley, University of Virginia
James Sethian, University of California, Berkeley.
Timothy S. Cale, Rensselaer Polytechnic Institute
Joe E. Greene, University of Illinois
Arthur F. Voter, Los Alamos National Laboratory
Andrew Labun, Intel
Stephen M. Rossnagel, IBM
Sadasivan Shankar, Intel
Herbert Sawin, Massachusetts Institute of Technology
Hong-Mei Zhang, Applied Materials
David E. Graves, University of California, Berkeley
Daniel Coronell, Motorola
Ken M. Takahashi, Lucent Technologies
Klavs Jensen, Massachusetts Institute of Technology
Peter S. Smereka, University of Michigan
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