|
|

Call for Papers / MRS Symposium D
Transistor
Scaling─Methods, Materials, and Modeling
Session
Topics | Invited Speakers | Organizers | Abstract
Submission
This
symposium is targeted at state-of-the-art for MOSFET transistors:
methods, materials and modeling. For the past four decades,
geometric scaling of silicon CMOS transistors has enabled
not only an exponential increase in circuit integration density─Moore's
Law─but also a corresponding enhancement in the transistor
performance. Simple MOSFET geometric scaling has driven the
industry to date; but, as the transistor gate length drops
to 35nm and the gate oxide thickness to 1nm, physical limitations
such as off-state leakage current and power density make
geometric scaling an increasingly challenging task, impeding
the pace of performance enhancements. In order to continue
CMOS device scaling and trends, innovations, both in device
structures and materials, are now required and the industry
needs a new scaling vector. Starting at the 90- and 65nm-technology
generation, strained siliconhas
emerged as one such innovation. Other device structures such
as multigate FETs may be introduced to meet the scaling challenge.
This symposium aims to bring together materials scientists,
silicon technologists, and TCAD researchers to share experimental
results and physical models related to state-of-the-art MOSFETs.
|
Session
Topics
Papers
are solicited in, but not limited to, the following areas:
- Process-induced strained Si development
- Different channel orientation or hybrid orientation
- SOI, ultrathin body SOI
- Multiple-gate technologies
- Characterization of the new materials and structures
- Modeling of process elements for transistor scaling
including strain measurements, SOI, and multigate device
characterization
|
Invited
Speakers
Invited
speakers include: Serge
Biesemans (IMEC, Belgium), Ken-Ichi
Goto (TSMC, Taiwan), Tsu-Jae King (Synopsys,
Inc., and Univ. of California-Berkeley), Kelin
Kuhn (Intel Corp.), Arkadii Samoilov (Maxim.),
and Lee Smith (Synopsys,
Inc.). |
Symposium
Organizers
Scott
Thompson
University
of Florida
SWAMP Center
Dept. of Electrical & Computer
Engineering
535 Engineering Bldg.
P.O. Box 116130
Gainesville, FL 32607
Tel 352-846-0320
Fax 352-392-8381
thompson@ece.ufl.edu
Faran
Nouri
Applied
Materials Inc.
974 E. Arques Ave.
Sunnyvale, CA 94086
Tel 408-584-0258
Fax 408-584-1193
faran_nouri@amat.com
Wilman
Tsai
Intel
Corporation
Technology Manufacturing Group
SC1-05,
2200 Mission College Blvd.
Santa Clara, CA 95054-1549
Tel 408-765-2261
Fax 408-765-2387
wilman.tsai@intel.com
Wen-Chin
Lee
TSMC
Exploratory
Technology Development-1, No. 8
Lin-Hsin Rd. 6
Hsinchu
Science Park
Hsinchu, Taiwan 300-77, R.O.C.
Tel 886-3-666-5158
Fax 886-3-563-7525
wcleei@tsmc.com
|
|
|